1. Field of the Invention
The present invention relates to a circuit board having patterns in the form of bumps with a very narrow variation in height projecting from at least one surface thereof, and more specifically, to a circuit board formed having high-reliability conduction structures between its general output and input terminals and conductor circuits and which is capable of high-density packaging of semiconductor devices. The present invention also relates to a bump-type contact head obtained with use of the circuit board, capable of satisfactorily checking even fine-pitch circuit components, such as LSIs, liquid crystal panels, TABs, PDPs, etc., for wiring failures, and which enjoys high accuracy in pitches between inspection terminals and excellent high-frequency characteristics. In addition, the present invention relates to a method for manufacturing these elements with high productivity and at low cost.
Still further, the invention relates to a semiconductor component packaging module of a novel connection structure, using the aforesaid circuit board as a packaging substrate and having various semiconductor components mounted on the substrate by die bonding.
2. Prior Art
Usually, a semiconductor device package, which may be incorporated in various electronic apparatuses such as a computer, portable communication apparatus, liquid crystal panel, etc., is constructed so that one semiconductor device, such as a bare chip, is mounted on a circuit board that is formed with predetermined patterns for conductor circuits, the continuity between this device and the respective output and input terminals of the conductor circuits is established to package the semiconductor device, and the whole structure is resin-molded.
The semiconductor device may be packaged by a method in which it is die-bonded to the circuit board and the output and input terminals of the circuit board and the terminals (lands) of the semiconductor device are wire-bonded, a method in which a flip chip is connected to the output and input terminals of the circuit board by, for example, soldering, or a method in which the output and input terminals of the circuit board and lead terminals of the semiconductor device are directly connected by soldering.
The semiconductor device package manufactured in this manner is incorporated in practical equipment by being mounted on a mother board (packaging substrate) on which the conductor circuits with the predetermined patterns are arranged. Usually, in this case, the area ratio of one semiconductor device package to the mother board ranges from about 1/10 to 1/5, so that a plurality of semiconductor device packages can be mounted on the mother board.
Conventionally, wire bonding is partially used for the mounting on the mother board. To meet the requirement for high-density packaging, however, a novel method has recently started to be widely used such that cream solder is pattern-printed on the lands of the mother board, the terminals (lead terminals or ball grid arrays) of the semiconductor device package are registered on the resulting pattern, and the whole resulting structure is subjected to blanket soldering in a reflow device.
There is a growing tendency for modern electronic apparatuses to become smaller in size, higher in operating speed, and more diverse in function. Accordingly, there is an increasing demand for the development of circuit boards capable of high-density packaging of semiconductor components despite the smallness in overall size.
To this end, it is advisable to use multilayer circuit boards and fine-pattern conductor circuits to be formed. Usually, however, conventional multilayer circuit boards are manufactured by the so-called build-up method, so that they involve the following problems.
In manufacturing a multilayer circuit board by the build-up method, a unit circuit board is first prepared by forming a conductor circuit, which serves as a signal pattern, on the surface of an insulating substrate as a bottom layer. Another unit circuit board, which is formed with another conductor circuit as another signal pattern, is put on the first one for unification. This operation is repeated so that a plurality of unit circuit boards are successively assembled from bottom to top.
In this case, a conduction structure between conductor circuits in each two adjacent layers, upper and lower, usually includes a plurality of through holes bored in a predetermined plane pattern through the unit circuit board in the thickness direction thereof. After the wall surface of each through hole is given electrical conductivity by, for example, electroless plating, electroplating is carried out with use of the conductor circuit in the lower layer as an electrical conduction path, and the respective lands of the conductor circuits in the upper and lower layers are connected electrically by means of the resulting deposit.
In order to effect the high-density packaging, therefore, the through holes should be made small in diameter. Practically, however, the hole diameter can be reduced only limitedly.
Generally, the through holes are formed by drilling, so that their diameter cannot be made very small in consideration of the drilling strength. Normally, the diameter of drilled holes ranges from 150 to 200 .mu.m. The diameter of through holes formed by photolithography ranges from about 100 to 150 .mu.m.
In the case where a deposit is formed on the wall surface of each bored through hole by combining the electroless plating and electroplating, it must secure a certain measure of thickness, since the electrical continuity between the conductor circuits in the upper and lower layers cannot be satisfactory if the deposit is too thin. For good electrical conduction between the conductor circuits, the thickness of the deposit is normally adjusted to about 20 to 30 .mu.m, depending on the type of the circuit board.
In general, therefore, a deposit with a thickness of 15 to 20 .mu.m is formed on the surface of each through hole with a diameter of 150 to 200 .mu.m, in the conduction structure based on the through holes. In the center of each through hole, in this case, exists a dead space with a diameter of about 100 to 150 .mu.m that has no connection with the conduction between the conductor circuits at all.
Also in the case of inner via holes, a dead space with a diameter of about 60 to 70 .mu.m is created if the diameter of each hole is, for example, 100 .mu.m. Thus, the diameter of the conventional through holes or inner via holes can be reduced only limitedly, and has no effect on the conduction between the conductor circuits, inevitably.
Normally, the following operation is carried out to form the deposit on the wall surface of each through hole in each of inner layers that are built up in succession. After electrical conductivity is given to the whole surface of a target inner layer (including the wall surface of each existing through hole or inner via hole) by electroless plating, a thin deposit is formed by electroplating the inner layer surface. Then, a dry film, for example, is sticked on the surface of the deposit so as to cover it, and is exposed and developed to expose only those portions corresponding to the through holes. The resulting structure is further electroplated with the remaining portion masked, whereupon a deposit of a given thickness is formed on the surface of each through hole (and land). Thereafter, the dry film is separated, and the thin deposit on the exposed surface of the inner layer and the deposit formed by the electroless plating are removed by, for example, soft etching.
In manufacturing a multilayer circuit board by building up the individual inner layers, therefore, the aforesaid operation must be repeated for each inner layer, so that complicated manufacturing processes are required. Thus, the manufacture takes long time, inevitably entailing high manufacturing costs.
In the case of the inner via holes, solid conduction structures may be formed between the layers by forming a deposit on the wall surface of each via hole and then embedding, for example, electrically conductive paste in the dead space remaining in the center of the deposit.
In this case, the solid conduction structures may possibly be formed by simultaneously electrodepositing and filling a conductive material in all the via holes by electroplating in place of the embedding of the conductive paste. In the build-up method, however, it is necessary to provide a conduction path separately for an input terminal for electroplating in advance in the first stage of the manufacture, so that the manufacturing processes are more complicated.
In forming a packaging substrate such as a semiconductor device package or a circuit board, such as a mother board, that has a projecting bump pattern on its packaging surface by the build-up method, a bump material is electrodeposited by, for example, electroplating to form the bump pattern with an intended height on a predetermined portion of a conductor circuit in the top layer, among other conductor circuits built: up in succession.
In actual electroplating operation, however, all bumps that constitute the bump pattern cannot be formed with the same height, due to influences of delicate fluctuation in the plating conditions or variation in the flows of electric current to spots for the formation of the individual bumps, so that the bump height varies. In the case where the target bump height is 0.03 mm, for example, the bump height variation is about .+-.0.003 mm.
If the variation in the bump height is too wide, then some bumps will not be connected to the lands of the semiconductor device package even though the lands are positioned for a reflow process. Thus, reliable packaging cannot be effected.
In consideration of these circumstances, it is necessary to minimize the variation in the height of the bumps in the case of the circuit board that has the bump pattern formed on its packaging surface.
A contact head for checking wiring circuits in LSIs, liquid crystal panels, etc. for troubles is a kind of circuit board. Conventionally, in the contact head of this type, pin probes or L-shaped needles are embedded in an electrically insulating rigid material, and are fixed to the body of the head at predetermined pitches so that their respective tip ends can come into contact with predetermined inspection spots in a wiring circuit as an object of inspection. Also, wires are soldered individually to the respective other ends of the probes or needles so that signals for the inspection spots can be fetched from the other ends. On the other hand, there is a bump system in which bumps are formed by, for example, electroplating in specific circuit portions of a circuit board that has a predetermined circuit pattern, or by a film forming method that is used in the field of semiconductor production, and these bumps are operated in place of the aforesaid pin probes or L-shaped needles.
Recently, the circuit patterns of various circuit components as objects of inspection, and therefore, the pitches between the inspection spots have been becoming finer and finer.
To match the fine pitches between the inspection spots, in the case of a pin-probe head, holes to allow the tip ends of the pin probes to project are formed and arranged zigzag at infinitesimal intervals in the surface of the head. In the case of a head that uses L-shaped needles, the needles to be fixed are tiered.
These countermeasures, however, entail operation to fix at regular pitches the individual pin probes or L-shaped needles that increase remarkably in number as the pitches between the inspection spots become finer, and also, operation to solder a wire to each probe or needle. Thus, completion of products requires a great deal of skill and long operating time, so that the resulting heads are very expensive, inevitably. Even after the pin probes or L-shaped needles are fixed to the head, moreover, their respective tip ends require an accurate location and rearrangement therefor. During storage before shipping, furthermore, close attention must be paid not to run the probe or needle tips against other articles.
In the case of a head having tiered L-shaped needles, the respective elongate portions of the needles are arranged parallel to one another. If the frequencies of input and output signals are heightened, for example, to increase the speed of inspection, therefore, the resulting characteristics of the head may be adversely affected to cause inspection errors, in some cases.
In forming bumps of a bump-type head by electroplating, on the other hand, the bump height is subject to a substantial variation, as mentioned before. The wide variation in the bump height is fatal to the head in which all the bumps must be brought securely into contact with their corresponding inspection spots in the wiring circuit, as a vital necessity.
In the case where bumps are formed by means of a thin film manufacturing apparatus, which is used in the field of semiconductor production and is very expensive, the resulting heads are also very expensive, and a mechanism for integrating the heads with probe cards is necessary. Also required is a drive mechanism for moving the bumps upward, in order to bring them into contact with the inspection spots in the wiring circuit at the time of inspection, and downward after the inspection. Thus, the heads obtained are complicated in construction and more expensive.
If an attempt is made to mount semiconductor components on the conventional packaging substrate at high density, the dead space inevitably enlarges with the increase of spots for mounting the components, since the conduction structures are based on through holes or inner via holes, as mentioned before. In a packaging substrate of a certain standard size, therefore, the number of regions for the formation of necessary bump patterns (or lands) for component packaging and the extent thereof are limited, so that the effort toward high-density packaging is restricted. If high-density packaging is intended to be achieved, the arrangement of additional signal patterns is needed, so that the multilayer structure of the substrate or circuit board is bound to be further complicated. Accordingly, wires in the signal patterns are lengthened, so that the reliability of the electrical properties of the resulting packaging substrate may be lowered in some cases.